An inverter functions to invert a signal inputted thereto, that is, the input signal and an output signal of the inverter are signals opposite to each other. With development of electronic technology, the inverter has been widely used for example in an emitting driving circuit of an organic light-emitting display device, to provide respective potentials or levels for a pixel compensating circuit electrically connected to the emitting driving circuit, such that the pixel compensating circuit can accomplish node initialization, threshold compensation, data writing, etc.
FIG. 1 illustrates a circuit diagram of a traditional inverter. With reference to FIG. 1, transistors M1 and M2 and an input terminal In and an output terminal Out connected with the transistors M1 and M2 constitute an inverter circuit. Specifically, a clock signal terminal CLKB is connected to a first electrode and a gate of the transistor M1, a second electrode of the transistor M1 is connected to the output terminal Out, a gate of the transistor M2 is connected to the input terminal In, a first terminal of the transistor M2 is connected to the output terminal Out, and a second terminal of the transistor M2 is connected to a low level terminal VGL.
In the above inverter circuit, when the clock signal terminal CLKB is at a high level and the input terminal In is at a high level, the transistors M1 and M2 are both turned on, due to voltage division between a resistor of the transistor M1 and a resistor of the transistor M2, a voltage Vout at the output terminal Out can be expressed as follows: Vout=R2/(R1+R2)·(VCLKB−VVGL)+VVGL, where R1 is the resistance value of the transistor M1 when a voltage at the gate of the transistor M1 is VCLKB, R2 is the resistance value of the transistor M2 when a voltage at the gate of the transistor M2 is VIn, VCLKB is the voltage at the clock signal terminal CLKB when the clock signal terminal CLKB is at a high level, VVGL is the voltage at the low level terminal VGL, VIn is the voltage at the input terminal In when the input terminal In is at a high level. From the above equation, no matter how small the resistance value of the transistor M2 is, when the clock signal terminal CLKB is at a high level and the input terminal In is at a high level, it is impossible for the voltage Vout at the output terminal Out to be reduced to VVGL, thus rendering that the output signal of the inverter is affected by characteristics of the Field-Effect-Thin-Film-Transistor (TFT) and is thus unstable.